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WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. 🔹 THE ROLEAs a PHY‑V Lead, you will own physical verification sign-off, full-chip integration, and packaging interface (RDL) planning for advanced SoC programs. You will drive DRC/LVS clean tapeouts, integration quality, and sign-off predictability across complex multi-IP designs.This role requires strong expertise in physical verification, top-level integration, and advanced packaging alignment, along with the ability to lead cross-functional execution across PD, Analog, and Packaging teams.🔹 THE PERSONStrong technical leader with deep PD + Physical Verification understandingProven ownership of sign-off closure for complex SoCsAbility to drive execution across multiple teams and dependenciesDetail-oriented with focus on quality, manufacturability, and schedule predictabilityComfortable operating in high-pressure tapeout environments🔹 KEY RESPONSIBILITIES✅ Physical Verification & Sign-off OwnershipDrive end-to-end DRC, LVS, ERC, antenna closure at block and full-chip levelDefine and enforce sign-off methodology and quality criteriaOwn foundry rule decks, waivers, and risk assessmentsDeliver sign-off clean GDS for tapeout✅ SoC / Full-Chip IntegrationLead top-level integration of IPs/macros into SoCOwn: GDS assemblyHierarchical LVS reconciliationResolve: Boundary issuesConnectivity mismatchesIntegration conflictsEnsure robust integration across internal and third-party IPs✅ RDL & Packaging IntegrationDrive RDL planning and bump mapping strategyDefine IO escape routing and die–package interfaceCollaborate with Packaging, SI/PI, and system teamsEnable flip-chip / 2.5D / 3D integration readiness✅ Tapeout Execution & TrackingOwn sign-off checklist, closure tracking, and tapeout readinessLead tapeout reviews and milestone trackingDrive cross-team closure to meet schedule and quality targets✅ Methodology & Flow DevelopmentDefine and improve physical verification flows (Calibre/ICV/Pegasus)Drive: Automation (TCL/Python)Runtime optimizationDebug efficiencyEstablish best practices for hierarchical and incremental sign-off✅ Debug & Issue ResolutionLead debug of: Complex DRC violationsLVS mismatches (shorts/opens/connectivity issues)Drive closure with PD/layout teamsMinimize waivers and ensure risk-managed sign-off✅ Leadership & CollaborationLead and mentor PHY‑V engineersAct as primary escalation point for sign-off issuesInterface with: PD / PnR teamsAnalog/layout teamsPackaging and foundry teams🔹 REQUIRED QUALIFICATIONSB.Tech / M.Tech in Electronics / Electrical Engineering10–15+ years in Physical Design / Physical Verification / SoC IntegrationStrong expertise in: DRC, LVS, ERC, antenna checksTools: Calibre / ICV / PegasusSolid understanding of: Full PD flow (RTL → GDS → sign-off)Advanced process nodes (7nm and below)🔹 PREFERRED QUALIFICATIONSExperience in: Full-chip SoC integration and GDS assemblyRDL planning and advanced packaging flowsExposure to: IR/EM, SI/PI, PEX, reliability checksChiplet / 2.5D / 3D-IC methodologiesStrong scripting (TCL/Python) for automation#LI-BM2 Benefits offered are described: AMD benefits at a glance.AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.This posting is for an existing vacancy.
